[7] R. Khalil and S. A. Kazzaz, Digital Hardware Implementation of Artificial Neuron Model Using FPGA, Department of Electrical Engineering, University of Mosul, Mosul, Iraq, 2008, diciembre, pp. 12-24. [En línea]. Disponible en https://rengj.mosuljournals.com/pdf_38764_d3b8e5f57cd6fd55752d5cee3b7be404.html.